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<Article>
<Journal>
				<PublisherName>The Physics Society of Iran</PublisherName>
				<JournalTitle>Iranian Journal of Physics Research</JournalTitle>
				<Issn>1682-6957</Issn>
				<Volume>25</Volume>
				<Issue>3</Issue>
				<PubDate PubStatus="epublish">
					<Year>2025</Year>
					<Month>12</Month>
					<Day>22</Day>
				</PubDate>
			</Journal>
<ArticleTitle>Enormous improvement of mobility of 2D carrier gas using high-κ dielectric in SiGe quantum well</ArticleTitle>
<VernacularTitle>Enormous improvement of mobility of 2D carrier gas using high-κ dielectric in SiGe quantum well</VernacularTitle>
			<FirstPage>217</FirstPage>
			<LastPage>224</LastPage>
			<ELocationID EIdType="pii">3742</ELocationID>
			
<ELocationID EIdType="doi">10.47176/ijpr.25.3.02202</ELocationID>
			
			<Language>FA</Language>
<AuthorList>
<Author>
					<FirstName>Rezvan</FirstName>
					<LastName>Torkashvand</LastName>
<Affiliation>Department of Physics, Faculty of Science, Bu-Ali Sina University, Hamedan, Iran</Affiliation>
<Identifier Source="ORCID">0009-0000-9545-1848</Identifier>

</Author>
<Author>
					<FirstName>Ghassem</FirstName>
					<LastName>Ansaripour</LastName>
<Affiliation>Department of Physics, Faculty of Science, Bu-Ali Sina University, Hamedan, Iran</Affiliation>

</Author>
</AuthorList>
				<PublicationType>Journal Article</PublicationType>
			<History>
				<PubDate PubStatus="received">
					<Year>2025</Year>
					<Month>10</Month>
					<Day>10</Day>
				</PubDate>
			</History>
		<Abstract>Using different scattering mechanisms such as, surface roughness, alloy, charge impurity, strain, phonon scattering and regarding the effect of various dielectric constants, calculations of the carrier mobility in a strained SiGe quantum well on (001) Si are implemented. It is shown that the mobility of carriers inside the channel increases several times as a result of increasing the dielectric mismatch. At low temperatures, using a dielectric coating (k=100) the mobility rises from 1600 cm^2/Vs to 12300 cm^2 /V s which shows an increase of more than seven times, whereas at room temperature and same density the mobility increases from  760 cm^2 /V s to 970 cm^2 /V s. I&lt;br /&gt;In fact, increasing the dielectric constant weakens the screening effect and the attenuation of Coulomb potential. This mobility enhancement at low temperatures occurs for any carrier densities, but at high temperatures and low densities, the behavior is completely different. Failure to account for this dielectric mismatch causes incorrect results at high densities, and this becomes more obvious with increasing dielectric coefficient. The findings of this study emerge a comprehensive picture of the effect of dielectrics on charge transport in quantum well for low and room temperature at different carrier densities, as well as, help us to identify the optimal dielectric coating for the design and fabrication of the high mobility nanoscale transistors.&lt;br /&gt;.</Abstract>
			<OtherAbstract Language="FA">Using different scattering mechanisms such as, surface roughness, alloy, charge impurity, strain, phonon scattering and regarding the effect of various dielectric constants, calculations of the carrier mobility in a strained SiGe quantum well on (001) Si are implemented. It is shown that the mobility of carriers inside the channel increases several times as a result of increasing the dielectric mismatch. At low temperatures, using a dielectric coating (k=100) the mobility rises from 1600 cm^2/Vs to 12300 cm^2 /V s which shows an increase of more than seven times, whereas at room temperature and same density the mobility increases from  760 cm^2 /V s to 970 cm^2 /V s. I&lt;br /&gt;In fact, increasing the dielectric constant weakens the screening effect and the attenuation of Coulomb potential. This mobility enhancement at low temperatures occurs for any carrier densities, but at high temperatures and low densities, the behavior is completely different. Failure to account for this dielectric mismatch causes incorrect results at high densities, and this becomes more obvious with increasing dielectric coefficient. The findings of this study emerge a comprehensive picture of the effect of dielectrics on charge transport in quantum well for low and room temperature at different carrier densities, as well as, help us to identify the optimal dielectric coating for the design and fabrication of the high mobility nanoscale transistors.&lt;br /&gt;.</OtherAbstract>
		<ObjectList>
			<Object Type="keyword">
			<Param Name="value">mobility improvement</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">dielectric coating</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">scattering mechanisms</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">screening</Param>
			</Object>
			<Object Type="keyword">
			<Param Name="value">quantum well</Param>
			</Object>
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<ArchiveCopySource DocType="pdf">https://ijpr.iut.ac.ir/article_3742_1f72e258ff730035f2a1fb6637f562c2.pdf</ArchiveCopySource>
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