Document Type : Original Article
Authors
Department of Physics, Faculty of Science, Bu-Ali Sina University, Hamedan, Iran
Abstract
Using different scattering mechanisms such as, surface roughness, alloy, charge impurity, strain, phonon scattering and regarding the effect of various dielectric constants, calculations of the carrier mobility in a strained SiGe quantum well on (001) Si are implemented. It is shown that the mobility of carriers inside the channel increases several times as a result of increasing the dielectric mismatch. At low temperatures, using a dielectric coating (k=100) the mobility rises from 1600 cm^2/Vs to 12300 cm^2 /V s which shows an increase of more than seven times, whereas at room temperature and same density the mobility increases from 760 cm^2 /V s to 970 cm^2 /V s. I
In fact, increasing the dielectric constant weakens the screening effect and the attenuation of Coulomb potential. This mobility enhancement at low temperatures occurs for any carrier densities, but at high temperatures and low densities, the behavior is completely different. Failure to account for this dielectric mismatch causes incorrect results at high densities, and this becomes more obvious with increasing dielectric coefficient. The findings of this study emerge a comprehensive picture of the effect of dielectrics on charge transport in quantum well for low and room temperature at different carrier densities, as well as, help us to identify the optimal dielectric coating for the design and fabrication of the high mobility nanoscale transistors.
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